Biography：
Zihao Yu received his Ph.D. degree from ICT, CAS in 2022. He focuses on open-source chips and RISC-V projects. He is now an engineer. He is responsible for One Student One Chip Initiative and other RISC-V projects.
Research area：
His research direction contains computer architecture, open-source chips, RISC-V, and binary translation. He has published several papers in ASPLOS, MICRO and etc.
Selected papers：
(1) Yinan Xu, Zihao Yu, Dan Tang, Guokai Chen, Lu Chen, Lingrui Gou, Yue Jin et al. "Towards developing high performance RISC-V processors using agile methodology." In 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 1178-1199. IEEE, 2022.
(2) Yinan Xu, Zihao Yu, Dan Tang, Ye Cai, Dandan Huan, Wei He, Ninghui Sun, Yungang Bao. "Toward Developing High-Performance RISC-V Processors Using Agile Methodology," in IEEE Micro, vol. 43, no. 4, pp. 98-106, July-Aug. 2023, doi: 10.1109/MM.2023.3273562.
(3) Jiuyue Ma, Xiufeng Sui, Ninghui Sun, Yupeng Li, Zihao Yu, Bowen Huang, Tianni Xu et al. "Supporting differentiated services in computers via programmable architecture for resourcing-on-demand (PARD)." In Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 131-143. 2015.
