Biography：
Ruihao Gao received his Ph.D. from the Institute of Computing Technology, Chinese Academy of Sciences in 2025. In the same year, he joined the Advanced Computer Systems Research Center at the Institute of Computing Technology, Chinese Academy of Sciences, where he conducts research in areas such as domain-specific hardware architectures, RTL simulation acceleration methods, and RISC-V extension acceleration architectures.
Research area：
Computer architecture, Domain-specific hardware architecture, RTL Simulation Acceleration, RISC-V Accelerator Extension Architecture
Selected papers：
1) Gao Ruihao, Li Xueqi, Li Yewen, et al. MetaZip: a high-throughput and efficient accelerator for DEFLATE[C]//Proceedings of the 59th ACM/IEEE Design Automation Conference. 2022: 319-324.
2）Gao Ruihao, Li Zhichun, Tan Guangming, et al. Beezip: Towards an organized and scalable architecture for data compression[C]//Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3. 2024: 133-148.
3）Li Yewen, Li Xueqi, Gao Ruihao, et al. NvWa: Enhancing sequence alignment accelerator throughput via hardware scheduling[C]//2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 2023: 1236-1248.
