The volatile DRAM faces several challenges, such as low scalability and high energy consumption. It's difficult for DRAM to satisfy the increasing capacity and energy requirement of applications. Emerging Non-Volatile Memory (NVM) is a promising technology to complement DRAM memory. Such NVMs include PCM, MRAM, RRAM, and the latest 3D XPoint. NVMs show higher scalability, and thus larger capaticy. However, NVMs also suffer from write issues, including long write latency, high write energy, and limited write endurance. Thus, hybrid memory consisting of DRAM and NVM is an ideal solution for memory system. To evaluate the performance and energy efficiencies of hybrid memory, we develop a hybrid memory simulator, called HMSim1.



The NVM emulator uses NUMA architecture to emulate NVM. NUMA has two memory nodes, node 0 and node1. Applications run on the top of node 0 and use node 1 as NVM memory. The emulator inserts extra memory access latency to applications according to the counts that applications load data from remote memory. The emulator also emulates high write latency of NVM by decreasing DRAM bandwidth.

Note that, the emulator should be run on the top of Intel Xeon E5 V3 processor.

1.NVM-beta1.0.zip (1.1MB)