Assistant Researcher/Engineer
  • Biwei Xie

  • E-mail: xiebiwei@ict.ac.cn

Biography:

Biwei Xie received his Ph.D. degree from ICT, CAS in 2018. He focuses on open-source chips and EDA projects. He is now an assistant professor. He is responsible for One Student One Chip Initiative and open-source EDA programs.

Research area:

His research direction contains open-source EDA program, open-source chips, high-performance computing, and architecture system deisgn. He has published several papers in CGO, ICS and etc.

Selected papers:

(1) Zhiyuan Yan, Biwei Xie, Xingquan Li, Yungang Bao. Exploiting Architecture Advances for Sparse Solver in Circuit Simulation. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition ( DATE 2021) . Mar 14-23, 2021, Antwerp, Belgium.

(2)Biwei Xie, Jianfeng Zhan, Xu Liu, Wanling Gao, Zhen Jia, Xiwen He, and Lixin Zhang. CVR: efficient vectorization of SpMV on x86 processors. In Proceedings of the 2018 International Symposium on Code Generation and Optimization (CGO2018). Feb 24-28, 2018, Vienna, Austria.  

(3)Changxi Liu, Biwei Xie, Xin Liu, Wei Xue, Hailong Yang, and Xu Liu. Towards efficient SpMV on sunway many-core architectures. In Proceedings of the 2018 International Conference on Supercomputing (ICS2018). Jun 12-15, 2018, Beijing, China.  

(4)Wanling Gao, Jianfeng Zhan, Lei Wang, Chunjie Luo, Daoyi Zheng, Fei Tang, Biwei Xie, Chen Zheng, Xu Wen, Xiwen He, Hainan Ye, and Rui Ren. Data Motifs: A Lens Towards Fully Understanding Big Data and AI Workloads. In Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques(PACT2018). Nov 01-04, 2018, Limassol, Cyprus.