Assistant Researcher/Engineer
  • Tianyue Lu

  • E-mail: lutianyue@ict.ac.cn

Biography:

Tianyue Lu,got a doctor's degree in engineering from UCAS in 2019. And he was employed by Advanced Computer System research center of ICT in the same year.

Research area:

Computer Architecture,Design and Optimization of Memory System,Processor Security

Selected papers:

(1) Lu, Tianyue; Chen, Licheng; Chen, Mingyu ; Achieving Efficient Packet-based Memory System by Exploiting Correlation of Memory Requests, Design, Automation and Test in Europe Conference an d Exhibition (DATE)

(2) Haiyang Pan; Yuhang Liu; Tianyue Lu; Mingyu Chen ; Characterizations and Architectural Implications of NVM's External DRAM Cache, 2019 IEEE 21st International Conference on High Performance Computing and Communications; IEEE 17th International Conference on Smart City; IEEE 5th International Conference on Data Science and Systems (HPCC/SmartCity/DSS)

(3) Lu, Tianyue; Liu, Yuhang; Pan, Haiyang; Chen, Mingyu ; TDV cache: Organizing Off-Chip DRAM Cache of NVMM from a Fusion Perspective, 35th IEEE International Conference on Computer Design (ICCD)

(4) Tianyue Lu; Yuhang Liu; Mingyu Chen ; Fine-Grained Data Committing for Persistent Memory,2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC)

(5) LiCheng Chen; Tianyue Lu; Yanan Wang; Mingyu Chen; Yuan RUAN; ZeHan Cui; YongBing Huang; Mingyang Chen; Jiutian Zhang; YunGang Bao ; MIMS:Towards a Message Interface Based Memory System, Journal of Computer Science and Technology(JCST), 2014, 29(2): 272